In producing semiconductor integrated circuit chips or die for use in electronic equipment, a wafer, such as a thin insulating disc, usually silicon, having a large number of identical circuits formed on its face or top surface is first fabricated. Upon completion of wafer fabrication and after preliminary testing of each device and then severing of the wafer into individual chips, the back of each chip is mounted or secured onto a package receiving surface such as a cavity or tab of a package housing. This mounting or securing of the chip back is generally obtained by way of a thin layer of gold plating on the package cavity or tab which is used as the bonding agent. This mounting or securing is usually accomplished by heating the receiving surface of a package and by use of mild pressure and slight relative motion, called "scrubbing", between the back of the chip and the package receiving surface. Scrubbing can be accomplished by placing the back of the chip: onto the heated surface of the receiving package, onto full gold preform on the surface of the receiving package and waiting for the preform to melt, or, into previously placed and molten silicon/gold or other eutectic preform.
However, the mounting of the chip to such a package receiving surface or housing has not been entirely satisfactory for a number of reasons but especially because of the incompleteness of the bonding contact between the back side of the chip and the receiving surface of the package to which the chip is being mounted. In general only about 10 to about 70%, usually only about 20 to 30%, of the back side surface area of the chip is in bonding contact or attachment with the receiving surface of the package. This limited contact area between chip back side and receiving surface of the package produces numerous undesirable and detrimental results. For example, the limited contact area produces a mismatch in the coefficients of thermal expansion of the attached and non-attached regions of the chip back, leading to differing rates of thermal expansion across the bottom or back of the chip, thus causing or resulting in undesirable non-uniform thermal expansion stresses in the top or circuit surface regions of the chip.
Additionally, there is non-uniform thermal dissipation of heat from the chip to the package due to the partial contact of the chip to the package. Since the area of best thermal dissipation is created in the attachment region, other heat escape paths in non-attachment areas create differing and non-uniform thermal gradients throughout the chip resulting in non-uniform thermal dissipation stresses in the top surface of the chip. Moreover, while the above undesirable stresses exist in hermetic packages, they are exacerbated therein by the non-hermetic type plastic packaging, due to the compressive forces of the plastic molding compound causing the chip to bend or distort, and thus resulting in non-uniform compressional stresses on the top surface of the chip. These non-uniform stresses produced by the incomplete chip-package attachment condition mentioned result in uneven and changeable electrical performance of the chip circuit or can render the circuit inoperable for its intended purpose or lead to early failure of the chip circuit.
It would be highly desirable therefore to provide a chip which has essentially 100% attachment of the chip back side to the receiving surface of the package so that the aforementioned non-uniform thermal dissipation, compressional and thermal expansion stresses, and resulting performance drawbacks of the packaged circuits, could be avoided or substantially eliminated. It has previously been proposed that either a polymeric chip attach material, such as an epoxy or polyimide polymer, or a combination of silver and glass as a chip attach material, be employed.
However, each of these proposals themselves produce unacceptable drawbacks and problems. Polymeric chip attach materials suffer from outgas of moisture from within the polymer and eventually may result in device corrosion. To utilize the silver/glass combination as a chip attach medium, the curing of the silver/glass requires furnace processing at approximately 400.degree. to 420.degree. C. for several minutes. This high temperature curing causes extensive oxidation of sealing surfaces on both header and sidebraze packages, and such oxidation seriously adversely affects seal yield.
Therefore, it would be most beneficial if a chip could be provided which enables essentially 100% attachment of its back surface to the receiving surface of a package, and that such would eliminate or minimize the aforementioned deficiencies of partial chip backside attachment, while avoiding the unwanted results of a polymeric or silver/glass chip attach system.